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Maxim > Design Support > Technical Documents > Application Notes > Analog Switches and Multiplexers > APP 1866
Maxim > Design Support > Technical Documents > Application Notes > Signal Generation Circuits > APP 1866
Keywords: pulse generator, CMOS switches, CMOS logic gates, SPDT switch, analog switches, high
speed pulse generator, MAX4644, fast rise/fall times, pull-up/pull down driver, SPDT analog switch,
output driver, function generators, fast digital edge
APPLICATION NOTE 1866
High-Speed Pulse Generator Has Programmable
Levels
Jan 31, 2003
Abstract: As integrated circuits (ICs) speed up, the rise/fall times of most pulse and function generators
(5ns typical) become inadequate for measuring time intervals below 20ns. You can overcome this
limitation with analog switches or advanced CMOS logic gates, which create faster digital edges. The
turn-on/ turn-off times for these switches produce very fast rise/fall times. A single-pole double-throw
(SPDT) switch can create pulses whose high and low levels are programmable.
Lilliputian dimensions associated with the sub-micron geometries of most digital and many analog
processes result in much faster circuit operation. As ICs speed up, the rise/fall times of most pulse and
function generators (5ns typical) become inadequate for measuring time intervals below 20ns. You can
overcome this limitation with analog comparators or advanced CMOS logic gates, which create faster
digital edges. Their rise/fall times are fast enough, but the signal levels include ground and V
CC
only.
The sub-micron processes used in high-speed digital circuits have been applied to analog switches as
well, so the turn-on/ turn-off times for these switches also produce very fast rise/fall times. What's more,
a single-pole double-throw (SPDT) switch can create pulses whose high and low levels are
programmable.
A feature of the analog switch that hinders its use as a pulse generator is the intrinsic built-in delay
(break-before-make time) that guarantees a SPDT switch does not short the two switched terminals
together during a transition. Unfortunately, this delay and the switches' finite turn-on time also extends
the rise and fall times. You can avoid this effect by adding a dynamic pull-up and pull-down to the circuit
(Figure 1). A sufficiently low pull-up/pull-down impedance can drastically improve the corresponding rise
and fall times.
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