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数据手册 > 微控制器,MCU,单片机 > NXP > DSP56F807VF80 数据手册PDF > DSP56F807VF80 用户编程手册 第 1/21 页
DSP56F807VF80
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DSP56F807VF80 用户编程手册 - NXP

  • 制造商:
    NXP
  • 分类:
    微控制器,MCU,单片机
  • 封装
    BGA-160
  • 描述:
    16Bit DSC, 56800 core, 128KB Flash, 80MHz, MAPBGA 160
更新时间: 2025-06-18 17:57:18 (UTC+8)

DSP56F807VF80 用户编程手册

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1 Introduction
MC56F800x DSCs have two integrated Programmable Gain
Amplifiers (PGA) that can amplify the differential signals by
up to 32 times and convert it to the single ended signal, which
is one of the on-chip ADC inputs.
On old maskset 1M53M devices, with PGA hardware trigger
mode enabled in both PGAs, each Programmable Delay Block
(PDB) trigger signal will cause a PGA to generate pre-trigger
signal to both ADCs. This results in the ADC pre-trigger
signal contention and the sample_select signal inside the
ADCs may toggle and cause the wrong ADC status and
control register to control the conversion.
The new maskset devices (2M53M or newer) fixed this issue
with new enhanced features and support sampling four analog
signals per single hardware trigger. The applications designed
for old maskset devices, can run smoothly on the new maskset
devices.
This application note describes the new enhanced features of
PGA and the possible valid PGA configurations for different
signal sampling schemes.
Freescale Semiconductor
Document Number: AN4334
Application Note
Rev. 0, 03/2012
Use of PGA on MC56F800x
Interaction of PDB, PGA and ADC
by:
William Jiang
System and Application, Microcontroller Solutions Group
© 2012 Freescale Semiconductor, Inc.
Contents
1 Introduction................................................................1
2 PGA new features.....................................................2
3 Valid PGA configurations.........................................5
4 Conclusion...............................................................20

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