Datasheet
数据手册 > LVDS,M-LVDS,ECL,CML > TI > DS90C241QVSX/NOPB 数据手册PDF > DS90C241QVSX/NOPB 用户编程手册 第 1/11 页
DS90C241QVSX/NOPB
¥ 45.67
百芯的价格

DS90C241QVSX/NOPB 用户编程手册 - TI

更新时间: 2025-05-11 09:07:41 (UTC+8)

DS90C241QVSX/NOPB 用户编程手册

页码:/11页
下载 PDF
重新加载
下载
DS90C383B
+3.3V Programmable LVDS Transmitter 24-Bit Flat Panel
Display (FPD) Link-65 MHz
General Description
The DS90C383B transmitter converts 28 bits of CMOS/TTL
data into four LVDS (Low Voltage Differential Signaling) data
streams. A phase-locked transmit clock is transmitted in
parallel with the data streams over a fifth LVDS link. Every
cycle of the transmit clock 28 bits of input data are sampled
and transmitted. At a transmit clock frequency of 65 MHz, 24
bits of RGB data and 3 bits of LCD timing and control data
(FPLINE, FPFRAME, DRDY) are transmitted at a rate of 455
Mbps per LVDS data channel. Using a 65 MHz clock, the
data throughput is 227 Mbytes/sec. The DS90C383B trans-
mitter can be programmed for Rising edge strobe or Falling
edge strobe through a dedicated pin. A Rising edge or
Falling edge strobe transmitter will interoperate with a Falling
edge strobe Receiver (DS90CF386) without any translation
logic.
This chipset is an ideal means to solve EMI and cable size
problems associated with wide, high speed TTL interfaces.
Features
n No special start-up sequence required between
clock/data and /PD pins. Input signal (clock and data)
can be applied either before or after the device is
powered.
n Support Spread Spectrum Clocking up to 100kHz
frequency modulation & deviations of
±
2.5% center
spread or −5% down spread.
n "Input Clock Detection" feature will pull all LVDS pairs to
logic low when input clock is missing and when /PD pin
is logic high.
n 18 to 68 MHz shift clock support
n Best–in–Class Set & Hold Times on TxINPUTs
n Tx power consumption
<
130 mW (typ)
@
65MHz
Grayscale
n 40% Less Power Dissipation than BiCMOS Alternatives
n Tx Power-down mode
<
60µW (typ)
n Supports VGA, SVGA, XGA and Dual Pixel SXGA.
n Narrow bus reduces cable size and cost
n Up to 1.8 Gbps throughput
n Up to 227 Megabytes/sec bandwidth
n 345 mV (typ) swing LVDS devices for low EMI
n PLL requires no external components
n Compatible with TIA/EIA-644 LVDS standard
n Low profile 56-lead TSSOP package
n Improved replacement for:
SN75LVDS83, DS90C383A
Block Diagram
DS90C383B
20098401
Order Number DS90C383BMT
See NS Package Number MTD56
TRI-STATE
®
is a registered trademark of National Semiconductor Corporation.
PRELIMINARY
July 2004
DS90C383B +3.3V Programmable LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link-65 MHz
© 2004 National Semiconductor Corporation DS200984 www.national.com
页面指南

DS90C241QVSX/NOPB 数据手册 PDF

DS90C241QVSX/NOPB 数据手册
TI
31 页, 987 KB
DS90C241QVSX/NOPB 用户编程手册
TI
11 页, 262 KB
DS90C241QVSX/NOPB 其它数据手册
TI
40 页, 2193 KB

DS90C241 数据手册 PDF

DS90C241
数据手册
TI
5-35MHz DC- Balanced 24Bit FPD-Link II Serializer
DS90C241IVS/NOPB
数据手册
TI
LVDS Serializer 1.2V 48Pin TQFP Tray
DS90C241QVS/NOPB
数据手册
TI
LVDS Serializer 1.2V 48Pin TQFP Tray
DS90C241IVSX/NOPB
数据手册
TI
LVDS Serializer 1.2V 48Pin TQFP T/R
DS90C241QVSX/NOPB
数据手册
TI
LVDS Serializer 1.2V 48Pin TQFP T/R
DS90C241IVS
其它数据手册
TI
SERDES, 24Bit, 535MHz, SMD, TQFP48
DS90C241QVS
其它数据手册
TI
LVDS Serializer 1.2V 48Pin TQFP Tray
DS90C241QVSX
数据手册
TI
Ic Serial/Deserial 24Bit 48-Tqfp - Ds90c241qvsx/Nopb
DS90C241IVSX
数据手册
TI
Ic Serial/Deserial 24Bit 48-Tqfp - Ds90c241ivsx/Nopb
DS90C241-Q1
数据手册
TI
5-35MHz DC- Balanced 24Bit FPD-Link II Serializer
Datasheet 搜索
搜索
百芯智造数据库涵盖1亿多个数据手册,每天更新超过5,000个PDF文件。
在线联系我们
黄经理 - 百芯智造销售经理在线,5 分钟前
您的邮箱 *
消息 *
发送