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CY8C20234
Automotive PSoC
®
Programmable System-on-Chip
Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600
Document Number: 001-54650 Rev. *E Revised June 10, 2011
Features
■ Automotive Electronics Council (AEC) Q100 qualified
■ Low power CapSense
®
block
❐ Configurable capacitive sensing elements
❐ Supports combination of CapSense buttons, sliders, touch-
pads, and proximity sensors
■ Powerful Harvard-architecture processor
❐ M8C processor speeds up to 12 MHz
❐ Low power at high speed
❐ Operating voltage: 3.0 V to 5.25 V
❐ Automotive temperature range: –40 °C to +85 °C
■ Flexible on-chip memory
❐ 8 KB of flash program storage, 1000 erase/write cycles
❐ 512 bytes of SRAM data storage
❐ Partial flash updates
❐ Flexible protection modes
❐ In-system serial programming (ISSP)
■ Complete development tools
❐ Free development tool (PSoC Designer™)
❐ Full featured, in-circuit emulator (ICE) and programmer
❐ Full-speed emulation
❐ Complex breakpoint structure
❐ 128 KB trace memory
■ Precision, programmable clocking
❐ Internal ±5% 6-/12-MHz oscillator
❐ Internal low-speed, low-power oscillator for watchdog and
sleep functionality
■ Programmable pin configurations
❐ 20 mA sink on all general purpose I/Os (GPIOs)
❐ Pull-up, high Z, open drain, or strong drive modes on all
GPIOs
❐ Up to 13 analog inputs on GPIOs
❐ Configurable interrupt on all GPIOs
❐ Selectable, regulated digital I/O on Port 1
• 3.0 V, 2.4 V, and 1.8 V regulation available
• Up to 5 mA source on Port 1 GPIOs
■ Versatile analog mux
❐ Common internal analog bus
❐ Simultaneous connection of I/O combinations
❐ Comparator noise immunity
■ Additional system resources
❐ Configurable communication speeds
•I
2
C™ slave operation up to 400 kHz
• SPI master or slave operation between 46.9 kHz and
12 MHz
❐ Watchdog and sleep timers
❐ Internal voltage reference
❐ Integrated supervisory circuit
SRAM
512 Bytes
System Bus
Interrupt
Controller
6/12 MHz Internal Main Oscillator
Global Analog Interconnect
PSoC
CORE
CPU Core
(M8C)
SROM Flash 8K
SYSTEM RESOURCES
ANALOG
SYSTEM
Analog
Ref.
I2C Slave/SPI
Master-Slave
POR and LVD
System Resets
Port 1 Port 0
Sleep and
Watchdog
Analog
Mux
Port 3 Port 2
CapSense
Block
Config LDO
Logic Block Diagram
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