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www.cypress.com Document No. 001-59389 Rev. *G 1
AN59389
Host Sourced Serial Programming for CY8C20xx6A,
CY8C20xx6AS, CY8C20xx6L and CY8C20xx7/S
Author: Chris Hammer
Associated Project: Yes
Associated Part Family: CY8C20xx6A, CY8C20xx6AS
CY8C20xx6L and CY8C20xx7
Software Version: PSoC Designer™ 5.4 CP1
Related Documents: ISSP Programming Specifications
Host Sourced Serial Programming (HSSP) is a method of in-circuit serial programming (using ISSP protocol) of the
CY8C20xx6A, CY8C20xx6AS, CY8C20xx6L and CY8C20xx7 devices from an onboard host processor. AN59389
explains how to use and port the HSSP code example, provided along with this application note, to the desired host
processor for programming the CY8C20xx6A, CY8C20xx6AS, CY8C20xx6L and CY8C20xx7 devices.
Introduction
Cypress’s PSoC microcontrollers are easy-to-use, flexible,
and have a cost-effective mix of reprogrammable analog
and digital resources. These features provide many
opportunities for creative designs, one of which is
programming the PSoC serially by an on-board host
processor. This method is used to install or update
firmware in-field or even completely reprogram the PSoC
for a different function.
Cypress created the HSSP Code Example to give system
designers a starting point to create their own serial
programming software. Designers have to make minimal
modifications to the code to make it compatible with their
specific host programmer. The Code Example covers only
the CY8C20xx6A, CY8C20xx6AS, CY8C20xx6L, and
CY8C20xx7 devices and provides a high level of
abstraction. For more information on serial programming,
refer to ISSP Programming Specifications.
This application note describes the implementation on a
high level. Protocol details and meaning of the vectors are
proprietary and intentionally omitted.
Overview
The HSSP Code Example has four major parts: main
function, sub functions for various programming steps,
low-level I/O functions, and definition files. The system
designer's direct involvement with the code is to set
certain properties through #defines to provide code to fill
a 128-byte buffer with programming data and to provide
low-level drivers for the host I/O.
PSoC devices are programmed in two different modes:
Reset and Power Cycle. Reset mode, which is the
preferred programming mode, is used only when the
system is powered externally. In this case, the XRES pin
on the target PSoC is toggled at the end of the process to
bring it out of programming mode and resume normal
operation. In the Power Cycle mode, the host
microcontroller switches the PSoC’s power on and off.
In each programming mode, the host needs three I/O pins.
These are: serial data (SDATA), serial clock (SCLK), and
external reset (XRES) in the Reset mode, and SDATA,
SCLK, and PSoC power (PWR) in the Power Cycle mode.
The software influences these pins.
The SDATA pin on the host processor must be
bidirectional. The host must be able to change the
properties of this pin so that it drives a signal to the PSoC,
is released to High-Z state, and is read.
