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AD8555ARZ 用户编程手册 - ADI

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AD8555ARZ 用户编程手册

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Zero-Drift, Digitally Programmable
Sensor Signal Amplifier
Data Sheet
AD8555
FEATURES
Very low offset voltage: 10 µV maximum over temperature
Very low input offset voltage drift: 60 nV/°C maximum
High CMRR: 96 dB minimum
Digitally programmable gain and output offset voltage
Single-wire serial interface
Open and short wire fault detection
Low-pass filtering
Stable with any capacitive load
Externally programmable output clamp voltage for driving
low voltage ADCs
LFCSP-16 and SOIC-8 packages
2.7 V to 5.5 V operation
−40°C to +125°C operation
APPLICATIONS
Pressure and position sensors
Thermocouple amplifiers
Industrial weigh scales
Precision current sensing
Strain gages
FUNCTIONAL BLOCK DIAGRAM
A3
A2
A4
A5
VDD
VDD
DAC
VSS
VSS
VDD
VSS
VDD
VDD
VSS
VCLAMP
VPOS
VSS
FILT/
DIGOUT
VOUT
A1
VDD
VSS
VNEG
R1
R3
R2
R5 R7
P4
R4
R6
RF
P3
P2
P1
04598-0-001
Figure 1.
GENERAL DESCRIPTION
The AD8555 is a zero-drift, sensor signal amplifier with
digitally programmable gain and output offset. Designed to
easily and accurately convert variable pressure sensor and strain
bridge outputs to a well-defined output voltage range, the
AD8555 also accurately amplifies many other differential or
single-ended sensor outputs. The AD8555 uses the ADI
patented low noise auto-zero and DigiTrim® technologies to
create an incredibly accurate and flexible signal processing
solution in a very compact footprint.
Gain is digitally programmable in a wide range from 70 to 1,280
through a serial data interface. Gain adjustment can be fully
simulated in-circuit and then permanently programmed with
proven and reliable poly-fuse technology. Output offset voltage
is also digitally programmable and is ratiometric to the supply
voltage.
In addition to extremely low input offset voltage and input
offset voltage drift and very high dc and ac CMRR, the AD8555
also includes a pull-up current source at the input pins and a
pull-down current source at the VCLAMP pin. This allows
open wire and shorted wire fault detection. A low-pass filter
function is implemented via a single low cost external capacitor.
Output clamping set via an external reference voltage allows the
AD8555 to drive lower voltage ADCs safely and accurately.
When used in conjunction with an ADC referenced to the same
supply, the system accuracy becomes immune to normal supply
voltage variations. Output offset voltage can be adjusted with a
resolution of better than 0.4% of the difference between VDD
and VSS. A lockout trim after gain and offset adjustment
further ensures field reliability.
The AD8555 is fully specified over the extended industrial
temperature range of −40°C to +125°C. Operating from single-
supply voltages of 2.7 V to 5.5 V, t h e AD8555 is offered in the
narrow 8-lead SOIC package and the 4 mm × 4 mm 16-lead
LFCSP.
Rev. B
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©20042015 Analog Devices, Inc. All rights reserved.
Technical Support www.analog.com
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AD8555ARZ 数据手册
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AD8555ARZ 用户编程手册
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AD8555ARZ 其他参考文件
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