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74HC32;
74HCT32
NXP Semiconductors
32
GND
(1)
1A
V
CC
1B
4B
1Y
4A
2A
4Y
2B
3B
2Y
3A
GND
3Y
001aad101
Fig 4. Pin configuration DIP14, SO14 and (T)SSOP14
terminal 1
index area
1B
2
1Y
3
4
13 4B
12
4A
11
2A
2B
2Y
5
6
10
9
4Y
3B
3A
001aad102
Transparent top view
(1)
The
die
substrate
is
attached
to
this
pad
using
conductive
die
attach
material.
It
cannot
be
used
as
a
supply
pin
or
input.
Fig 5. Pin configuration DHVQFN14
5.
Pinning information
5.1 Pinning
32
1
14
2
13
3
12
4
11
5
10
6
9
7
8
5.2 Pin description
Table
2. Pin description
Symbol Pin Description
1A to 4A 1, 4, 9, 12 data input
1B to 4B 2, 5, 10,13 data input
1Y to 4Y 3, 6, 8, 11 data output
GND 7 ground (0 V)
V
CC
14 supply voltage
6.
Functional description
Table 3. Function table
[1]
L
L L
L
H
H
H
L
H
H
H
H
[1]
H = HIGH voltage level;
L = LOW voltage level;
X = don’t care.
74HC_HCT32
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 5 — 4 September 2012 3 of 17
GND 7
3Y 8
1 1A
14
V
CC
Input Output
nA nB nY
