MC100LVEL51DR2 数据手册 Datasheet - Motorola

制造商：
Motorola
封装：
SOP
描述：
100LVEL SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO8, PLASTIC, SOIC-8
文档：

MC100LVEL51DR2 应用笔记 (9 页)

更新时间： 2023/11/13 09:58:11 (UTC+8)

MC100LVEL51DR2 数据手册PDF (9 页)

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MC100LVEL51DR2 文档

MC100LVEL51DR2 应用笔记

Motorola

9 页, 167 KB

ON Semiconductor

3.3V ECL Differential Clock D Flip-Flop

ON Semiconductor

Flip Flop D-Master-Slave Type Pos-Edge/Neg-Edge 1Element 8Pin SOIC N T/R

ON Semiconductor

Flip Flop D-Master-Slave Type Pos-Edge/Neg-Edge 1Element 8Pin SOIC N Rail

ON Semiconductor

Flip Flop D-Master-Slave Type Pos-Edge/Neg-Edge 1Element 8Pin SOIC N T/R

ON Semiconductor

Flip Flops 3.3V/5V ECL D-Type w/Diff Clock

ON Semiconductor

Flip Flop D-Master-Slave Type Pos-Edge/Neg-Edge 1Element 8Pin SOIC N Rail

ON Semiconductor

Flip Flop D-Master-Slave Type Pos-Edge/Neg-Edge 1Element 8Pin DFN EP T/R

ON Semiconductor

Flip Flop D-Master-Slave Type Pos-Edge/Neg-Edge 1Element 8Pin TSSOP T/R

ON Semiconductor

Flip Flop D-Master-Slave Type Pos-Edge/Neg-Edge 1Element 8Pin TSSOP Rail

ON Semiconductor

Flip Flop D-Master-Slave Type Pos-Edge/Neg-Edge 1Element 8Pin TSSOP Rail

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