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SBVU005 − OCTOBER 2003
DEM−SOT223LDO
DESCRIPTION
The Texas Instruments DEM−SOT223LDO demonstra-
tion module (DEM) helps designers evaluate the operation
and performance of Texas Instrument’s low-dropout regu-
lators (LDOs). This module is compatible with most posi-
tive output LDOs offered in the SOT223 (DCQ) package.
CIRCUIT
The schematic in Figure 1 illustrates all the possible
connections available to evaluate LDOs in the SOT223
(DCQ) package. Depending on the LDO being evaluated,
different components can be omitted. Each model may
only use some of the components. The schematics in
Figure 2 illustrate the connections required to evaluate the
two common LDO pinouts in the SOT223 package.
C1
C2
J1
J2
J3
1
2
1
U1
GND
2
5
4
3
1
2
J5
J4
1
2
1
2
J6
1
2
R3
R2/C3
R4/C4
1
2
R1
Figure 1. Circuit Schematic
COMPONENTS
This DEM is specifically designed to be assembled using
surface-mount devices with footprints ranging from 0603
to 1210. Additional holes have been provided to
accommodate leaded components. When selecting
components, refer to the product datasheet for specific
guidelines.
BOARD LAYOUT
This DEM is a two-layer printed circuit board (PCB). The
LDO is grounded through pin 3 to the top ground plane.
The bottom layer of the PCB also provides extra pads
where additional surface-mount components can be
added in parallel to the top-side components. Figure 3
shows the top assembly layer for the PCB.
C1
VIN
J1
J4
J3
1
2
1
U1
GND
5
2
4
3
EN
1
2
J5
FB
J2
VOUT
1
2
GND
1
2
J6
GND
1
2
R1
R2/C3
C2
1
2
(a) Circuit Configuration, Pinout A
C2
VIN
J2
J1
J3
1
2
2
U1
GND
1
4
5
3
EN
1
2
J4
FB
J5
VOUT
1
2
GND
1
2
J6
GND
1
2
R3
R4/C4
R2/C3
1
2
(b) Circuit Configuration, Pinout B
Figure 2. Example Board Configurations for
Evaluating SOT223 LDOs
Figure 3. PCB Layout − Top Assembly
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this document.
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