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TPS659110
,
TPS659112
,
TPS659113
TPS6591133, TPS659116, TPS659114
SWCS049P –JUNE 2010–REVISED AUGUST 2015
TPS65911x Integrated Power Management Unit Top Specification
1 Device Overview
1.1 Features
1
The Purpose of the TPS65911 Device is to Provide the Following Resources:
• Embedded Power Controller (EPC) With EEPROM • Nine Configurable GPIOs With Multiplexed Feature
Programmability Support:
• Two Efficient Step-Down DC-DC Converters for – Four can be used as Enable for External
Processor Cores (VDD1, VDD2) Resources, Included into Power-up Sequence
and Controlled by State Machine.
• One Efficient Step-Down DC-DC Converter for I/O
Power (VIO) – As GPI, GPIOs Support Logic-Level Detection
and can Generate Maskable Interrupt for Wake-
• One Controller for External FETs (VDDCtrl)
up.
• Dynamic Voltage Scaling for Processor Cores
– Two of the GPIOs have 10-mA Current Sink
• Eight LDO Voltage Regulators and one RTC LDO
Capability for Driving LEDs.
(Supply for Internal RTC)
– DC-DC Converters Switching Synchronization
• One High-Speed I
2
C Interface for General-Purpose
Through an External 3-MHz Clock.
Control Commands (CTL-I
2
C)
• Two Reset Inputs, for Cold Reset (HDRST) and a
• Two Independent Enable Signals for Controlling
Power Initialization Reset (PWRDN) for Thermal
Power Resources (EN1, EN2). Alternatively, These
Reset Input
Pins can be Used as a High-Speed I
2
C Interface
• 32-kHz Clock and Reset (NRESPWRON) for
Dedicated for Voltage Scaling for VDD1 and
System and an Additional Output for Reset Signal
VDD2.
• Watchdog
• Thermal Shutdown Protection and Hot-Die
Detection • Two ON and OFF LED Pulse Generators and One
PWM Generator
• A Real-Time Clock (RTC) Resource With:
• Two Comparators for System Control, Connected
– Oscillator for 32.768-kHz Crystal or 32-kHz
to VCCS Pin
Built-in RC Oscillator
• A JTAG and Boundary Scan, but not Accessible in
– Date, Time, and Calendar
Functional Mode (Test Purpose)
– Alarm Capability
1.2 Applications
Portable and Handheld Systems
1.3 Description
The TPS65911 is an integrated power management IC available in 98-pin 0.65-mm pitch BGA package
and dedicated to applications powered by one Li-Ion or Li-Ion polymer battery cell or 3-series Ni-MH cells
or a 5-V input, and which require multiple power rails. The device provides three step-down converters,
one controller for external FETs to support high current rail, eight LDOs, and is designed to be flexible
PMIC for supporting different processors and applications.
Two of the step-down converters provide power for dual processor cores and support dynamic voltage
scaling by a dedicated I
2
C interface for optimum power savings. The third converter provides power for the
I/Os and memory in the system.
The device includes eight general-purpose LDOs providing a wide range of voltage and current
capabilities. Five of the LDOs support 1.0 to 3.3 V with 100-mV step and three (LDO1, LDO2, LDO4)
support 1.0 to 3.3 V with 50-mV step. All LDOs are fully controllable by the I
2
C interface.
In addition to the power resources, the device contains an EPC to manage the power sequencing
requirements of systems and an RTC. Power sequencing is programmable by EEPROM.
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
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