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User's Guide
SLVU354–March 2010
Using the TPS650061EVM 2.25 MHz Step-Down Converter
with Dual LDO
The TPS650061 is a single chip Power Management ICs for portable applications. The device combines a
single step-down converter with two low dropout regulators and a Supply Voltage Supervisor (SVS). The
step-down converter enters a low power mode at light load for maximum efficiency across the widest
possible range of load currents. For low noise applications the device can be forced into fixed frequency
PWM mode. The step-down converter allows the use of a small inductor and capacitors to achieve a small
solution size. The step-down converter has Power Good status output that can be used for sequencing.
The LDOs are capable of supplying 300mA and can operate with an input voltage range between 1.6V
and 6.0V, allowing them to be supplied from the step-down converter or directly from the main battery.
The step-down converter and the LDOs have separate voltage inputs and enables, allowing for design
and sequencing flexibility.
Contents
1 Introduction .................................................................................................................. 2
1.1 Applications ......................................................................................................... 2
1.2 Features ............................................................................................................. 2
2 TPS650061 EVM Electrical Performance Specifications .............................................................. 3
3 Schematic .................................................................................................................... 4
4 Connector and Test Point Description ................................................................................... 5
4.1 J1 – VIN/GND ...................................................................................................... 5
4.2 J2 – RST/GND ..................................................................................................... 5
4.3 J3 – VODC / GND ................................................................................................. 5
4.4 J4– VLDO1/GND ................................................................................................... 5
4.5 J5 – VLDO2 ......................................................................................................... 5
4.6 J6 – PG/GND ....................................................................................................... 5
4.7 JP1 – VINLDO1 .................................................................................................... 5
4.8 JP2 – VINLDO2 .................................................................................................... 5
4.9 JP3 –ENDCDC ..................................................................................................... 6
4.10 JP4 –ENLDO1 ...................................................................................................... 6
4.11 JP5 – ENLDO2 ..................................................................................................... 6
4.12 JP6 –MODE ........................................................................................................ 6
4.13 JP7 – MRPU ........................................................................................................ 6
4.14 JP8 – VPU .......................................................................................................... 6
4.15 JP9 – RSTSNS_IN ................................................................................................. 6
5 TPS650061 Typical Performance Data and Characteristic Curves .................................................. 6
5.1 Efficiency ............................................................................................................ 7
5.2 Line and Load Regulation ......................................................................................... 7
5.3 Output Voltage Ripple ............................................................................................. 9
5.4 Startup Timing .................................................................................................... 10
6 EVM Assembly Drawings and Layout .................................................................................. 11
7 List of Materials ............................................................................................................ 14
List of Figures
1 TPS650061EVM Schematic............................................................................................... 4
2 TPS650061 Efficiency vs Load Current.................................................................................. 7
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SLVU354–March 2010 Using the TPS650061EVM 2.25 MHz Step-Down Converter with Dual LDO
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