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TMS320C5515
www.ti.com
SPRS645E –AUGUST 2010– REVISED JANUARY 2012
TMS320C5515 Fixed-Point Digital Signal Processor
Check for Samples: TMS320C5515
1 Fixed-Point Digital Signal Processor
1.1 Features
12
• High-Performance, Low-Power, TMS320C55x™ • Device USB Port With Integrated 2.0
Fixed-Point Digital Signal Processor High-Speed PHY that Supports:
– 16.67-, 13.33-, 10-, 8.33-ns Instruction Cycle – USB 2.0 Full- and High-Speed Device
Time
• LCD Bridge With Asynchronous Interface
– 60-, 75-, 100-, 120-MHz Clock Rate
• Tightly-Coupled FFT Hardware Accelerator
– One/Two Instruction(s) Executed per Cycle
• 10-Bit 4-Input Successive Approximation (SAR)
– Dual Multipliers [Up to 200 or 240 Million ADC
Multiply-Accumulates per Second (MMACS)]
• Real-Time Clock (RTC) With Crystal Input, With
– Two Arithmetic/Logic Units (ALUs) Separate Clock Domain and Power Supply
– Three Internal Data/Operand Read Buses • Four Core Isolated Power Supply Domains:
and Two Internal Data/Operand Write Buses Analog, RTC, CPU and Peripherals, and USB
– Software-Compatible With C55x Devices • Four I/O Isolated Power Supply Domains: RTC
I/O, EMIF I/O, USB PHY, and DV
DDIO
– Industrial Temperature Devices Available
• Three integrated LDOs (DSP_LDO, ANA_LDO,
• 320K Bytes Zero-Wait State On-Chip RAM,
and USB_LDO) to power the isolated domains:
Composed of:
DSP Core, Analog, and USB Core, respectively
– 64K Bytes of Dual-Access RAM (DARAM),
• Low-Power S/W Programmable Phase-Locked
8 Blocks of 4K x 16-Bit
Loop (PLL) Clock Generator
– 256K Bytes of Single-Access RAM (SARAM),
• On-Chip ROM Bootloader (RBL) to Boot From
32 Blocks of 4K x 16-Bit
NAND Flash, NOR Flash, SPI EEPROM, SPI
• 128K Bytes of Zero Wait-State On-Chip ROM
Serial Flash or I2C EEPROM
(4 Blocks of 16K x 16-Bit)
• IEEE-1149.1 (JTAG™)
• 4M x 16-Bit Maximum Addressable External
Boundary-Scan-Compatible
Memory Space (SDRAM/mSDRAM)
• Up to 26 General-Purpose I/O (GPIO) Pins
• 16-/8-Bit External Memory Interface (EMIF) with
(Multiplexed With Other Device Functions)
Glueless Interface to:
• 196-Terminal Pb-Free Plastic BGA (Ball Grid
– 8-/16-Bit NAND Flash, 1- and 4-Bit ECC
Array) (ZCH Suffix)
– 8-/16-Bit NOR Flash
• 1.05-V Core (60 or 75 MHz), 1.8-V, 2.5-V, 2.75-V,
– Asynchronous Static RAM (SRAM)
or 3.3-V I/Os
– SDRAM/mSDRAM (1.8-, 2.5-, 2.75-, and 3.3-V)
• 1.3-V Core (100, 120 MHz), 1.8-V, 2.5-V, 2.75-V,
• Direct Memory Access (DMA) Controller
or 3.3-V I/Os
– Four DMA With 4 Channels Each
• Applications:
(16-Channels Total)
– Wireless Audio Devices (e.g., Headsets,
• Three 32-Bit General-Purpose Timers
Microphones, Speakerphones, etc.)
– One Selectable as a Watchdog and/or GP
– Echo Cancellation Headphones
• Two MultiMedia Card/Secure Digital (MMC/SD)
– Portable Medical Devices
Interfaces
– Voice Applications
• Universal Asynchronous Receiver/Transmitter
– Industrial Controls
(UART)
– Fingerprint Biometrics
• Serial-Port Interface (SPI) With Four
– Software Defined Radio
Chip-Selects
• Master/Slave Inter-Integrated Circuit (I
2
C Bus™)
• Four Inter-IC Sound (I
2
S Bus™) for Data
Transport
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Products conform to
Copyright © 2010–2012, Texas Instruments Incorporated
specifications per the terms of the Texas Instruments standard warranty. Production
processing does not necessarily include testing of all parameters.
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