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MSP430F5255 产品设计参考

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MSP430F5259
,
MSP430F5258
,
MSP430F5257
,
MSP430F5256
MSP430F5255, MSP430F5254, MSP430F5253, MSP430F5252
SLAS903B MAY 2013REVISED NOVEMBER 2015
MSP430F525x Mixed-Signal Microcontrollers
1 Device Overview
1.1 Features
1
Dual-Supply Voltage Device Unified Clock System
Primary Supply (AVCC, DVCC) FLL Control Loop for Frequency Stabilization
Low-Power Low-Frequency Internal Clock
Powered From External Supply:
Source (VLO)
3.6 V Down to 1.8 V
Low-Frequency Trimmed Internal Reference
Up to 18 General-Purpose I/Os With up to 8
Source (REFO)
External Interrupts
32-kHz Watch Crystals (XT1)
Low-Voltage Interface Supply (DVIO)
HF Crystals up to 32 MHz (XT2)
Powered From Separate External Supply:
1.62 V to 1.98 V
16-Bit Timer TA0, Timer_A With Five
Capture/Compare Registers
Up to 35 General-Purpose I/Os With up to
16 External Interrupts
16-Bit Timer TA1, Timer_A With Three
Capture/Compare Registers
Serial Communications
16-Bit Timer TA2, Timer_A With Three
Ultra-Low Power Consumption
Capture/Compare Registers
Active Mode (AM):
16-Bit Timer TB0, Timer_B With Seven
All System Clocks Active
Capture/Compare Shadow Registers
290 µA/MHz at 8 MHz, 3.0 V, Flash Program
Execution (Typical)
Four Universal Serial Communication Interfaces
150 µA/MHz at 8 MHz, 3.0 V, RAM Program
USCI_A0, A1, A2, A3 Each Support:
Execution (Typical)
Enhanced UART With Automatic Baud-Rate
Standby Mode (LPM3):
Detection
Real-Time Clock (RTC) With Crystal, Watchdog,
IrDA Encoder and Decoder
and Supply Supervisor Operational, Full RAM
Synchronous SPI
Retention, Fast Wakeup:
USCI_B0, B1, B2, B3 Each Support:
2.1 µA at 2.2 V, 2.3 µA at 3.0 V (Typical)
I
2
C
Low-Power Oscillator (VLO), General-Purpose
Counter, Watchdog, and Supply Supervisor
Synchronous SPI
Operational, Full RAM Retention, Fast Wakeup:
10-Bit Analog-to-Digital Converter (ADC) With
1.6 µA at 3.0 V (Typical)
Internal Reference, Sample-and-Hold
Off Mode (LPM4):
Comparator
Full RAM Retention, Supply Supervisor
Hardware Multiplier Supports 32-Bit Operations
Operational, Fast Wakeup:
Serial Onboard Programming, No External
1.3 µA at 3.0 V (Typical)
Programming Voltage Needed
Shutdown Mode (LPM4.5):
Three-Channel Internal DMA
0.18 µA at 3.0 V (Typical)
Basic Timer With RTC Feature
Wakeup From Standby Mode in 3.5 µs (Typical)
Table 3-1 Summarizes the Available Family
16-Bit RISC Architecture, Extended Memory, up to
Members and Packages
25-MHz System Clock
For Complete Module Descriptions, See the
Flexible Power-Management System
MSP430x5xx and MSP430x6xx Family User's
Fully Integrated LDO With Programmable
Guide (SLAU208)
Regulated Core Supply Voltage
For Design Guidelines, See Designing With
Supply Voltage Supervision, Monitoring, and
MSP430F522x and MSP430F521x Devices
Brownout
(SLAA558)
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
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MSP430F5255 数据手册 PDF

MSP430F5255 数据手册
TI
113 页, 2034 KB
MSP430F5255 产品设计参考
TI
112 页, 1838 KB

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