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User's Guide
SNVA433A–March 2010–Revised May 2013
AN-2043 LM5035C Evaluation Board
1 Introduction
The LM5035C evaluation board is designed to provide the design engineer with a fully functional power
converter based on the half bridge topology to evaluate the LM5035C controller. The LM5035C is a
functional variant of the LM5035B half-bridge PWM controller. The amplitude of the SR control signals are
5V instead of the V
CC
level. The evaluation board is provided in an industry standard quarter-brick
footprint.
The performance of the evaluation board is as follows:
• Input operating range: 36V to 75V
• Output voltage: 3.3V
• Output current: 0 to 30A
• Measured efficiency: 89% at 30A, 92% at 15A
• Frequency of operation: 400kHz
• Board size: 2.28 x 1.45 x 0.5 inches
• Load Regulation: 0.2%
• Line Regulation: 0.1%
• Line under-voltage lock-out (UVLO) (33.9V/31.9V on/off)
• Line over-voltage protection (OVP) (79.4V/78.3V off/on)
• Hiccup current limit
The printed circuit board consists of 6 layers; 2 ounce copper outer layers and 3 ounce copper inner
layers on FR4 material with a total thickness of 0.062 inches. The unit is designed for continuous
operation at rated load at <40°C and a minimum airflow of 200 CFM.
2 Theory of Operation
Power converters based on the half bridge topology offer high efficiency and good power handling
capability in applications up to 500 Watts. The operation of the transformer causes the flux to swing in
both directions, thereby better utilizing the magnetic core.
The half bridge converter is derived from the Buck topology family, employing separate high voltage (HO)
and low voltage (LO) modulating power switches with independent pulse width timing. The main difference
between the topologies are, the Half Bridge topology employs a transformer to provide input/output ground
isolation and a step down or step up function.
Each cycle, the main primary switch turns on and applies one-half the input voltage across the primary
winding, which has 8 turns. The transformer secondary has 2 turns, leading to a 4:1 step-down of the
input voltage. For an output voltage of 3.3V, the composite duty cycle (D) of the primary switches varies
from approximately 75% (low line) to 35% (high line).
The secondary employs synchronous rectification controlled by the LM5035C. During soft-start, the sync
FET body diodes act as the secondary rectifiers until the main transformer energizes the gate drivers. The
DLY resistor programs the non-overlap timing for the sync FETs to maximize efficiency while eliminating
shoot through current. The Sync FET control signals are sent across the isolation boundary using a digital
isolator.
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SNVA433A–March 2010–Revised May 2013 AN-2043 LM5035C Evaluation Board
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