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ADUCM322 产品设计参考 - ADI

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ADUCM322 产品设计参考

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ADuCM320i/ADuCM322/ADuCM322i Reference Manual
UG-868
One Technology Way P. O. Box 9106 Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 Fax: 781.461.3113 www.analog.com
ADuCM320i/ADuCM322/ADuCM322i Reference Manual
PLEASE SEE THE LAST PAGE FOR AN IMPORTANT
WARNING AND LEGAL TERMS AND CONDITIONS.
Rev. A | Page 1 of 190
SCOPE
This manual provides a detailed description of the ADuCM320i/ADuCM322/ADuCM322i functionality and features.
FUNCTIONAL BLOCK DIAGRAMS
MEMORY
2 × 128kB FLASH
32kB SRAM
ARM
CORTEX-M3
PROCESSOR
MUX
RESET
AIN0
AIN5
AIN6
AIN15
BUF_VREF2V5
VDAC7
IDAC0
ADuCM320i
PVDDx
AGNDx
IOVDDx
IOGNDx
GENERAL-
PURPOSE
I/O PORTS
SWDIO
SWCLK
GPIO PORTS
UART
2 × SPI
2 × I
2
C
EXT IRQs
MDIO
PLA
INTERNAL
CHANNELS:
TEMPERATURE,
AV
DD
, IOV
DD
2.5V BAND GAP
DMA
NVIC
RESET SYSTEM
SERIAL WIRE
CLOCK SYSTEM
32.768kHz
16MHz OSC
80MHz PLL
3 × GENERAL-
PURPOSE TIMER
WATCHDOG TIMER
WAKE-UP TIMER
PWM
VDAC
IDAC3
14-BIT
SAR ADC
IDAC
IDAC
COMPARATOR
XTALO XTALI ECLKIN
PGND
AVDDx
DGNDx
PWM0 TO
PWM6
1.8V LDO
VDAC0
VDAC
13437-001
Figure 1. ADuCM320i Functional Block Diagram
MEMORY
2 × 128kB FLASH
32kB SRAM
ARM
CORTEX-M3
PROCESSOR
MUX
RESET
AIN0
AIN5
AIN6
AIN15
BUF_VREF2V5
VDAC7
ADuCM322/
ADuCM322i
PVDDx
AGNDx
IOVDDx
IOGNDx
GENERAL-
PURPOSE
I/O PORTS
SWDIO
SWCLK
GPIO PORTS
UART
2
× SPI
2 × I
2
C
EXT IRQs
MDIO
PLA
INTERNAL
CHANNELS:
TEMPERATURE,
AV
DD
, IOV
DD
2.5V BAND GAP
DMA
NVIC
RESET SYSTEM
SERIAL WIRE
CLOCK SYSTEM
32.768kHz
16MHz OSC
80MHz PLL
3 ×
GENERAL-
PURPOSE TIMER
WATCHDOG TIMER
WAKE-UP TIMER
PWM
VDAC
SAR ADC
COMPARATOR
XTALO XTALI ECLKIN
PGND
AVDDx
DGNDx
PWM0 TO
PWM6
1.8V LDO
VDAC0
VDAC
13437-102
Figure 2. ADuCM322/ADuCM322i Functional Block Diagram
页面指南

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