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© 2004 Analog Devices, Inc. All rights reserved.
Trademarks and registered trademarks are the
property of their respective owners.
Purchase of licensed I
2
C components of Analog
Devices or one of its sublicensed Associated
Companies conveys a license for the purchaser
under the Philips I
2
C Patent Rights to use these
components in an I
2
C system, provided that the
system conforms to the I
2
C Standard Specification
as defined by Philips.
Printed in the U.S.A. G04923-4-6/04(0)
F7FFh
0000h
FFFFh
F800h
7FFFh
0000h
FFFFh
8000h
1FFFh
0000h
FFFFh
2000h
Arithmetic Operations
bytes
OSC
periods
bytes
OSC
periods
Data Transfer Operations
Logical Operations
Boolean Variable Manipulation
Program Branching
bytes
OSC
periods
bytes
OSC
periods
bytes
OSC
periods
Legend
26
25
24
23
22
21
20
19
18
17
16
15
28
54
55
56
43
44
45
46
47
48
49
50
51
52
13
12
11
10
9
8
7
6
5
4
3
2
1
39
38
37
36
35
34
33
32
31
30
29
42
41
ADuC845
56-pin CSP
TOP VIEW
(not to scale)
pin 1 identifier
14
40
27
53
MQFP
CSP
MQFP
CSP
MQFP
CSP
Instructions That Affect Flags
MQFP
CSP
(65,536 counts
per
o
C)
200µA / 400µA
ADuC845/7/8
1-clock
8052
MCU
core
56
8
7
39
33
25
24
14
30
31
32
34
35
27
26
25
24
21
20
19
18
42
41
40
39
33
32
31
30
12
11
10
9
3
2
1
56
55
54
53
52
49
48
47
46
45
44
43
17
20
21
4
5
22
36
37
38
23
51
AIN1
REFIN+
REFIN-
INT1
INT0
T2EX
T2
T1
T0
DAC
AV
DD
SCLOCK
MOSI
MISO
ALE
PSEN
EA
RESET
XTAL1
XTAL2
DV
DD
DGND
33SS
11
12
I
EXC
1
I
EXC
2
P3.7
P3.6
P3.5
P3.4
P3.3
P3.2
P3.1
P3.0
P2.1
P2.0
P1.7
P1.6
P1.5
P1.4
P1.3
P1.2
P1.1
P1.0
P0.7
P0.6
P0.5
P0.4
P0.3
P0.2
P0.1
P0.0
P2.2
P2.3
P2.4
P2.5
P2.6
P2.7
18
19
RxD
TxD
41 PWM1
40 PWM0
1AIN2
2AIN3
3AIN4
9AIN5
10AIN6
11AIN7
12AIN8
15AIN9
16AIN10
13AINCOM
2
3
REFIN2+
REFIN2-
6
AGND
28
29
SCLK
SDATA
50
AIN
MUX
16-bit
counter
timers
DAC
control
ADC
control
&
calibration
DAC
OSC &
PLL
bandgap
reference
TEMP
sensor
time
interval
counter
V
REF
detect
& mux
ADC
control
&
calibration
24-bit
SD ADC
(primary ADC)
(auxillary ADC)
24-bit
SD ADC
power supply
monitor
SPI
62K x 8
code
Flash/EE
4K x 8
data
Flash/EE
watchdog
timer
256 x 8
user RAM
asynchronous
serial port
(
UART
)
downloader
debugger
PGABUF
BUF
single-pin
emulator
2K x 8
user XRAM
PWM
POR
baudrate timer
I
2
C
ADuC845 only
16-bit on ADuC848
Pin Functions
A Precision Analog Flash MCU
The ADuC845/ADuC847/ADuC848 is:
ADC:
24-bit* primary ADC, differential w/ programmable gain
24-bit auxiliary ADC, single-ended w/ fixed gain (ADuC845 only)
10-channel input mux (*ADC is 16bit on ADuC848)
DAC:
12-bit, 15µs, voltage output
<1LSB DNL
Flash/EEPROM:
up to 62kB Flash/EE program memory
4kB Flash/EE data memory
Microcontroller:
single-cycle 8052, up to 12.6MIPS
32 I/O lines, programmable PLL clock
(98.3kHz to 12.6MHz from 32kHz crystal)
Embedded Tools Support:
on-chip download/debug & single-pin emulation functions
Other on-chip features:
temperature sensor, power supply monitor, watchdog timer,
flexible serial interface ports, voltage reference, time interval
counter, dual 8-/16-bit PWM, power-on-reset
ADuC845/ADuC847/ADuC848
MicroConverter
®
Quick Reference Guide
FUNCTIONAL
BLOCK
DIAGRAM
Instruction Set
Interrupt Vector Addresses
Code Memory Space Options
REV. 0
26
25
24
23
22
21
20
19
18
17
16
15
14
40
41
42
43
44
45
46
47
48
49
50
51
52
13
12
11
10
9
8
7
6
5
4
3
2
139
38
37
36
35
34
33
32
31
30
29
28
27
ADuC845
52-pin MQFP
TOP VIEW
(not to scale)
pin 1 identifier
* pin numbers refer to CSP package
P3.7 (RD)
P3.6 (WR)
P3.5 (T1)
P3.4 (T0)
P3.3 (INT1)
P3.2 (INT0)
P3.1 (TxD)
P3.0 (RxD)
P2.1 (A9 / A17)
P2.0 (A8 / A16)
P1.7 (AIN8 / I
EXC
2)
P1.6 (AIN7 / I
EXC
1)
P1.5 (AIN6)
P1.4 (AIN5)
P1.3 (AIN4)
P1.2 (AIN3 / REFIN2-)
P1.1 (AIN2 / REFIN2+)
P1.0 (AIN1)
P0.7 (AD7)
P0.6 (AD6)
P0.5 (AD5)
P0.4 (AD4)
P0.3 (AD3)
P0.2 (AD2)
P0.1 (AD1)
P0.0 (AD0)
P2.2 (A10 / A18)
P2.3 (A11 / A19)
P2.4 (A12 / A20)
P2.5 (A13 / A21)
P2.6 (A14 / A22)
P2.7 (A15 / A23)
ADD A,Rn 1 1
ADD A,@Ri 1 2
add source to A
ADD A,direct 2 2
ADD A,#data 2 2
ADDC A,Rn 1 1
ADDC A,@Ri 1 2
add with carry
ADDC A,direct 2 2
ADDC A,#data 2 2
SUBB A,Rn 1 1
SUBB A,@Ri subtract from A 1 2
SUBB A,direct with borrow 2 2
SUBB A,#data 2 2
INC A 1 1
INC Rn 1 1
INC @Ri increment 1 2
INC direct 2 2
INC DPTR
* 13
DEC A 1 1
DEC Rn 1 1
decrement
DEC @Ri 1 2
DEC direct 2 2
MUL AB multiply A by B 1 9
DIV AB divide A by B 1 9
DA A decimal adjust 1 2
MOV A,Rn 1 1
MOV A,@Ri 1 2
MOV A,direct 2 2
MOV A,#data 2 2
MOV Rn,A 1 1
MOV Rn,direct 2 2
MOV Rn,#data 2 2
MOV direct,A 2 2
move
MOV direct,Rn 2 2
MOV direct,@Ri 2 2
MOV direct,direct 3 3
MOV direct,#data 3 3
MOV @Ri,A 1 2
MOV @Ri,direct 2 2
MOV @Ri,#data 2 2
MOV DPTR,#data16 3 3
MOVC A,@A+DPTR move from 1 4
MOVC A,@A+PC code memory 1 4
MOVX A,@Ri 1 4
MOVX A,@DPTR move to/from 1 4
MOVX @Ri,A data memory 1 4
MOVX @DPTR,A 1 4
PUSH direct push onto stack 2 2
POP direct pop from stack 2 2
XCH A,Rn 1 1
XCH A,@Ri exchange bytes 1 2
XCH A,direct 2 2
XCHD A,@Ri exchg low digits 1 2
ACALL addr11 2 3
call subroutine
LCALL addr16 3 4
RET return from sub. 1 4
RETI return from int. 1 4
AJMP addr11 2 3
LJMP addr16 3 4
jump
SJMP rel 2 3
JMP @A+DPTR 1 3
JC rel jump if C set 2 3
JNC rel jmp if C not set 2 3
JB bit,rel jump if bit set 3 4
JNB bit,rel jmp if bit not set 3 4
JBC bit,rel jmp&clear if set 3 4
JZ rel jump if A = 0 2 3
JNZ rel jump if A not 0 2 3
CJNE A,direct,rel 3 4
compare and
CJNE A,#data,rel 3 4
jump if not
CJNE Rn,#data,rel 3 4
equal
CJNE @Ri,#data,rel 3 4
DJNZ Rn,rel decrement and 2 3
DJNZ direct, rel jump if not zero 3 4
NOP no operation 1 1
CLR C 1 1
clear bit to zero
CLR bit 2 2
SETB C 1 1
set bit to one
SETB bit 2 2
CPL C 1 1
complement bit
CPL bit 2 2
ANL C,bit AND bit with C 2 2
ANL C,/bit AND (NOTbit) with C 2 2
ORL C,bit OR bit with C 2 2
ORL C,/bit OR (NOTbit) with C 2 2
MOV C,bit 2 2
move bit to bit
MOV bit,C 2 2
ANL A,Rn 1 1
ANL A,@Ri 1 2
ANL A,direct 2 2
logical AND
ANL A,#data 2 2
ANL direct,A 2 2
ANL direct,#data 3 3
ORL A,Rn 1 1
ORL A,@Ri 1 2
ORL A,direct 2 2
logical OR
ORL A,#data 2 2
ORL direct,A 2 2
ORL direct,#data 3 3
XRL A,Rn 1 1
XRL A,@Ri 1 2
XRL A,direct 2 2
logical XOR
XRL A,#data 2 2
XRL direct,A 2 2
XRL direct,#data 3 3
CLR A clear A to zero 1 1
CPL A complement A 1 1
RL A rotate A left 1 1
RLC A ...through C 1 1
RR A rotate A right 1 1
RRC A ...through C 1 1
SWAP A swap nibbles 1 1
Rn register addressing using R0-R7
@Ri indirect addressing using R0 or R1
direct 8-bit internal address (00h-FFh)
#data 8-bit constant included in instruction
#data16 16-bit constant included in instruction
bit 8-bit direct address of bit
rel signed 8-bit offset
addr11 11-bit address in current 2K page
addr16 16-bit address
x any of: Rn, @Ri, direct, #data
* INC DPTR increments the 24bit value DPP/DPH/DPL
ADD A,x C = carry out of bit 7
AC = carry out of bit 3
OV = carry out of bit 6, but not 7
ADDC A,x C = carry out of bit 7
AC = carry out of bit 3
OV = carry out of bit 6, but not 7
SUBB A,x C = borrow into bit 7
AC = borrow into bit 3
OV = borrow into bit 6, but not 7
MUL AB C = 0
OV = (result>255)
DIV AB C = 0
OV = divide by zero
DA A C = C or (x>100)
RRC A C = ACC.7
RLC A C = ACC.0
SETB C C = 1
CLR C C = 0
ANL C,bit C = C and bit
ANL C,/bit C = C and NOTbit
ORL C,bit C = C or bit
ORL C,/bit C = C or NOTbit
MOV C,bit C = bit
CJNE x,y,rel C = (x<y)
Interrupt Bit Interrupt Name
Vector
Address
Relative
Priority
PSMCON.5 Power Supply Monitor Interrupt 43h 1
WDS WatchDog Timer Interrupt 5Bh 2
IE0 External Interrupt 0 03h 3
RDY0/RDY1 End of ADC Conversion Interrupt 33h 4
TF0 Timer0 Overflow Interrupt 0Bh 5
IE1 External Interrupt 1 13h 6
TF1 Timer1 Overflow Interrupt 1Bh 7
ISPI/I2CI SPI/I
2
C Interrupt 3Bh 8
RI/TI UART Interrupt 23h 9
TF2/EXF2 Timer2 Interrupt 2Bh 10
TIMECON.2 Time Interval Counter Interrupt 53h 11
internal
code space
62kB
Flash/EE
(NOP instructions)
internal
code space
32kB
Flash/EE
(NOP instructions)
internal
code space
8kB
Flash/EE
(NOP instructions)
62 32 8
2 1 P1.1 / AIN2
3 2 P1.2 / AIN3 / REFIN2+
4 3 P1.3 / AIN4 / REFIN2-
54AV
DD
- 5 AGND
6 6 AGND
7 7 REFIN-
8 8 REFIN+
9 9 P1.4 / AIN5
10 10 P1.5 / AIN6
11 11 P1.6 / AIN7 / IEXC1
12 12 P1.7 / AIN8 / IEXC2
13 13 AINCOM / DAC
14 14 DAC
- 15 AIN9
(CSP package only)
- 16 AIN10 (CSP package only)
15 17 RESET
16 18 P3.0 / RxD
17 19 P3.1 / TxD
18 20 P3.2 / INT0
19 21 P3.3 / INT1
20 22 DV
DD
21 23 DGND
22 24 P3.4 / T0
23 25 P3.5 / T1
24 26 P3.6 / WR
25 27 P3.7 / RD
26 28 SCLK (I
2
C)
27 29 SDATA (I
2
C)
28 30 P2.0 / SCLOCK (SPI)
29 31 P2.1 / MOSI (SPI)
30 32 P2.2 / MISO (SPI)
31 33 P2.3 / SS / T2
32 34 XTAL1 (in)
33 35 XTAL2 (out)
34 36 DV
DD
35 37 DGND
- 38 DGND
36 39 P2.4 / T2EX
37 40 P2.5 / PWM0
38 41 P2.6 / PWM1
39 42 P2.7 / PWMCLK
40 43 EA
41 44 PSEN
42 45 ALE
43 46 P0.0 / AD0
44 47 P0.1 / AD1
45 48 P0.2 / AD2
46 49 P0.3 / AD3
47 50 DGND
48 51 DV
DD
49 52 P0.4 / AD4
50 53 P0.5 / AD5
51 54 P0.6 / AD6
52 55 P0.7 / AD7
1 56 P1.0 / AIN1
