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ADN2915ACPZ
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ADN2915ACPZ 产品设计参考 - ADI

更新时间: 2025-04-17 18:43:30 (UTC+8)

ADN2915ACPZ 产品设计参考

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ADI-BERT User Guide
UG-551
One Technology Way P. O. Box 9106 Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 Fax: 781.461.3113 www.analog.com
XStream™ ADI-BERT: An 11.3 Gbps Bit Error Rate Tester Solution Based on ADN2915,
a Continuous-Tuning Wideband Clock and Data Recovery IC
PLEASE SEE THE LAST PAGE FOR AN IMPORTANT
WARNING AND LEGAL TERMS AND CONDITIONS.
Rev. A | Page 1 of 32
FEATURES
Serial data input: 25.0 Mbps to 11.3 Gbps
Designed-in reference clock
PRBS generatorbased on an ADN2915
Exceeds all jitter specifications required by SONET/SDH,
including jitter transfer, jitter generation, and jitter
tolerance
Frequency multiplier option (ADN2915 in lock to reference
mode): allows producing up to 11.3 Gbps PRBS patterns
from clocks lower than 25 MHz
Error detectorbased on a second ADN2915
Detects PRBS7, PRBS15, and PRBS31 patterns
No external components needed
USB-to-I
2
C circuit allows I
2
C communication from a PC
12 V dc input, converted to ~5 V by a dc-to-dc converter, is
used by five ADP1706 regulators to power all of the chips
ADI-BERT KIT CONTENTS
ADI-BERT evaluation platform with enclosure
CD with PRBS generator GUI, Rev. 3.1 or higher
AC power adapter with power cord
USB cable
ADDITIONAL EQUIPMENT NEEDED
PC running Windows XP or higher
ONLINE RESOURCES
Documents Needed
ADN2915 data sheet
AD9577 data sheet
ADI-BERT user guide
Design and Integration Files
Schematics, layout files, bill of materials
FAQs and Troubleshooting
TYPICAL SETUP
Figure 1.
11473-001
USB
CABLE
DEVICE UNDER TEST
INPUT OUTPUT
PC RUNNING PRBS
GENERATOR GUI SOFTWARE
页面指南

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ADN2915 数据手册 PDF

ADN2915
数据手册
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Continuous Rate 6.5Mbps to 11.3Gbps Clock and Data Recovery IC with Integrated Limiting Amp/EQ
ADN2915ACPZ
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