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NVD4804NT4G 应用笔记 - ON Semiconductor

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NVD4804NT4G 应用笔记

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© Semiconductor Components Industries, LLC, 2014
September, 2014 − Rev. 14
1 Publication Order Number:
NTD2955/D
NTD2955, NVD2955
Power MOSFET
−60 V, −12 A, P−Channel DPAK
This Power MOSFET is designed to withstand high energy in the
avalanche and commutation modes. Designed for low−voltage, high−
speed switching applications in power supplies, converters, and power
motor controls. These devices are particularly well suited for bridge
circuits where diode speed and commutating safe operating areas are
critical and offer an additional safety margin against unexpected
voltage transients.
Features
Avalanche Energy Specified
I
DSS
and V
DS(on)
Specified at Elevated Temperature
Designed for Low−Voltage, High−Speed Switching Applications and
to Withstand High Energy in the Avalanche and Commutation Modes
NVD Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q101
Qualified and PPAP Capable
These Devices are Pb−Free and are RoHS Compliant
MAXIMUM RATINGS (T
J
= 25°C unless otherwise noted)
Rating
Symbol Value Unit
Drain−to−Source Voltage V
DSS
−60 Vdc
Gate−to−Source Voltage
− Continuous
− Non−repetitive (t
p
10 ms)
V
GS
V
GSM
± 20
± 25
Vdc
Vpk
Drain Current
Dr− Continuous @ T
a
= 25°C
Dr− Single Pulse (t
p
10 ms)
I
D
I
DM
−12
−18
Adc
Apk
Total Power Dissipation @ T
a
= 25°C P
D
55 W
Operating and Storage Temperature
Range
T
J
, T
stg
55 to
175
°C
Single Pulse Drain−to−Source Avalanche
Energy − Starting T
J
= 25°C
(V
DD
= 25 Vdc, V
GS
= 10 Vdc, Peak
I
L
= 12 Apk, L = 3.0 mH, R
G
= 25 W)
E
AS
216 mJ
Thermal Resistance
− Junction−to−Case
− Junction−to−Ambient (Note 1)
− Junction−to−Ambient (Note 2)
R
q
JC
R
q
JA
R
q
JA
2.73
71.4
100
°C/W
Maximum Lead Temperature for Soldering
Purposes, 1/8 in. from case for
10 seconds
T
L
260 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. When surface mounted to an FR4 board using 1 in pad size
(Cu area = 1.127 in
2
).
2. When surface mounted to an FR4 board using the minimum recommended
pad size (Cu area = 0.412 in
2
).
D
S
G
P−Channel
http://onsemi.com
−60 V
155 mW @ −10 V, 6 A
R
DS(on)
TYP
−12 A
I
D
MAXV
(BR)DSS
A = Assembly Location*
NT2955/NTP2955 = Device Code (DPAK)
NT2955 = Device Code (IPAK)
Y = Year
WW = Work Week
G = Pb−Free Package
1
Gate
3
Source
2
Drain
4
Drain
DPAK
CASE 369C
STYLE 2
1
2
3
4
IPAK
CASE 369D
STYLE 2
1
2
3
4
AYWW
NT
2955G
See detailed ordering and shipping information on page 5 o
f
this data sheet.
ORDERING INFORMATION
1
Gate
3
Source
2
Drain
4
Drain
AYWW
NT
2955G
MARKING DIAGRAMS
& PIN ASSIGNMENTS
* The Assembly Location code (A) is front side
optional. In cases where the Assembly Location is
stamped in the package, the front side assembly
code may be blank.
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