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© 2005 Fairchild Semiconductor Corporation DS500396 www.fairchildsemi.com
March 2001
Revised January 2005
NC7WZ125 TinyLogic
UHS Dual Buffer with 3-STATE Outputs
NC7WZ125
TinyLogic
UHS Dual Buffer with 3-STATE Outputs
General Description
The NC7WZ125 is a Dual Non-Inverting Buffer with inde-
pendent active LOW enables for the 3-STATE outputs. The
Ultra High Speed device is fabricated with advanced
CMOS technology to achieve superior switching perfor-
mance with high output drive while maintaining low static
power dissipation over a broad V
CC
operating range. The
device is specified to operate over the 1.65V to 5.5V V
CC
operating range. The inputs and outputs are high imped-
ance when V
CC
is 0V. Inputs tolerate voltages up to 5.5V
independent of V
CC
operating range. Outputs tolerate volt-
ages above V
CC
when in the 3-STATE condition.
Features
■ Space saving US8 surface mount package
■ MicroPak
Pb-Free leadless package
■ Ultra High Speed; t
PD
2.6 ns typ into 50 pF at 5V V
CC
■ High Output Drive; ±24 mA at 3V V
CC
■ Broad V
CC
Operating Range; 1.65V to 5.5V
■ Matches the performance of LCX when operated at
3.3V V
CC
■ Power down high impedance inputs/outputs
■ Overvoltage tolerant inputs facilitate 5V to 3V translation
■ Outputs are overvoltage tolerant in 3-STATE mode
■ Patented noise/EMI reduction circuitry implemented
Ordering Code:
Pb-Free package per JEDEC J-STD-020B.
Logic Symbol
IEEE/IEC
Pin Descriptions
Function Table
H = HIGH Logic Level L = LOW Logic Level Z = 3-STATE
Connection Diagrams
(Top View)
Pad Assignments for MicroPak
(Top Thru View)
TinyLogic is a registered trademark of Fairchild Semiconductor Corporation. MicroPak is a trademark of Fairchild Semiconductor Corporation.
Order Number
Package
Number
Product
Code Top
Mark
Package Description Supplied As
NC7WZ125K8X MAB08A WZ25 8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide 3k Units on Tape and Reel
NC7WZ125L8X MAC08A P3 Pb-Free 8-Lead MicroPak, 1.6 mm Wide 5k Units on Tape and Reel
Pin Names Description
OE
n
Enable Inputs for 3-STATE Outputs
A
n
Input
Y
n
3-STATE Outputs
Inputs Output
OE
A
n
Y
n
LLL
LHH
HLZ
HHZ
