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March 2007 Rev 1 1/25
AN2435
Application note
TM sepic converter in PFC pre-regulator
Introduction
For the PFC (power factor correction) converter, sepic topology can be used when an output
voltage lower than the maximum input voltage is required. This is instead of boost topology,
which is unsuitable beacuse it must have an output voltage higher than the maximum input
voltage. Sepic topology is advantageous because it allows the use of the ripple steering
technique in order to reduce the switching frequency components of the input current
without additional costs. This application note presents the basic equation of the sepic
converter, in addition to design guidelines for a sepic PFC operating in transition mode and
using the ripple steering technique. An application example with some tests results and
waveforms is also provided in the document.
Sepic converter
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