下载
AUGUST 2000
DSC-3624/04
1
©2000 Integrated Device Technology, Inc.
Features
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256K x 16 advanced high-speed CMOS Static RAM
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JEDEC Center Power / GND pinout for reduced noise.
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Equal access and cycle times
– Commercial and Industrial: 10/12/15ns
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One Chip Select plus one Output Enable pin
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Bidirectional data inputs and outputs directly
LVTTL-compatible
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Low power consumption via chip deselect
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Upper and Lower Byte Enable Pins
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Single 3.3V power supply
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Available in 44-pin, 400 mil plastic SOJ package and a 44-
pin, 400 mil TSOP Type II package and a 48 ball grid array,
9mm x 9mm package.
Description
The IDT71V416 is a 4,194,304-bit high-speed Static RAM organized
as 256K x 16. It is fabricated using IDT’s high-perfomance, high-reliability
CMOS technology. This state-of-the-art technology, combined with inno-
vative circuit design techniques, provides a cost-effective solution for high-
speed memory needs.
The IDT71V416 has an output enable pin which operates as fast as
5ns, with address access times as fast as 10ns. All bidirectional inputs and
outputs of the IDT71V416 are LVTTL-compatible and operation is from a
single 3.3V supply. Fully static asynchronous circuitry is used, requiring
no clocks or refresh for operation.
The IDT71V416 is packaged in a 44-pin, 400 mil Plastic SOJ and a
44-pin, 400 mil TSOP Type II package and a 48 ball grid array, 9mm x
9mm package.
Functional Block Diagram
Outp ut
Enab le
Buffer
Addres s
Buffe rs
Chip
Select
Buffer
Write
Enabl e
Buffer
Byte
Enable
Buffe rs
OE
A0 - A17
Row / Col umn
Decode rs
CS
WE
BHE
BLE
4, 194, 304 -b it
Memory
Array
Sens e
Amps
and
Write
Drivers
16
High
Byte
Outp ut
Buffer
High
Byte
Write
Buffer
Low
Byte
Write
Buffer
Low
Byte
Outp ut
Buffer
8
8
8
8
8
8
8
8
I/O 15
I/O 8
I/O 7
I/O 0
3624 drw 01
3.3V CMOS Static RAM
4 Meg (256K x 16-Bit)
IDT71V416S
IDT71V416L
