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EP2S180F1508C5N 应用笔记 - Altera

更新时间: 2025-06-17 15:28:04 (UTC+8)

EP2S180F1508C5N 应用笔记

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Altera Corporation Section I–1
Section I. Stratix II Device
Family Data Sheet
This section provides the data sheet specifications for Stratix
®
II devices.
This section contains feature definitions of the internal architecture,
configuration and JTAG boundary-scan testing information, DC
operating conditions, AC timing parameters, a reference to power
consumption, and ordering information for Stratix II devices.
This section contains the following chapters:
Chapter 1, Introduction
Chapter 2, Stratix II Architecture
Chapter 3, Configuration & Testing
Chapter 4, Hot Socketing & Power-On Reset
Chapter 5, DC & Switching Characteristics
Chapter 6, Reference & Ordering Information
Revision History
Refer to each chapter for its own specific revision history. For information
about when each chapter was updated, refer to the Chapter Revision
Dates section, which appears in the full handbook.
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EP2S180F1508C5 数据手册 PDF

EP2S180F1508C5
数据手册
Altera
FPGA Stratix® II Family 179400 Cells 609.76MHz 90nm (CMOS) Technology 1.2V 1508Pin FC-FBGA
EP2S180F1508C5
数据手册
Intel
Field Programmable Gate Array, 71760 CLBs, 640MHz, 179400-Cell, CMOS, PBGA1508, 40 X 40 MM, 1 MM PITCH, FBGA-1508
EP2S180F1508C5N
数据手册
Altera
FPGA Stratix II Family 179400 Cells 609.76MHz 90nm Technology 1.2V 1508Pin FC-FBGA
EP2S180F1508C5N
数据手册
Intel
Field Programmable Gate Array, 71760 CLBs, 640MHz, 179400-Cell, CMOS, PBGA1508, 40 X 40 MM, 1 MM PITCH, FBGA-1508
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