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Maxim > Design Support > Technical Documents > Application Notes > Digital Potentiometers > APP 3903
Maxim > Design Support > Technical Documents > Application Notes > Power-Supply Circuits > APP 3903
Keywords: DS1863, DS1865, fiber Monitoring, Optical transceiver
APPLICATION NOTE 3903
Using Internal Calibration and Right Shifting
(Scalable Dynamic Ranging) on the
DS1863/DS1865 to Enhance ADC Performance
By: Hrishikesh Shinde
Nov 02, 2006
Abstract:
This application note
discusses how an application can benefit from using internal calibration
and right shifting (Scalable Dynamic Ranging) with the DS1863/DS1865 controller/monitor chip. The article
explains how to implement internal calibration and right shifting, and provides an example to illustrate the
process.
Introduction
The DS1863 and the DS1865 controller/monitor devices use internal calibration and right shifting (Scalable
Dynamic Ranging) to greatly enhance the internal 13-bit ADC, giving it higher precision and accuracy
without added cost and size. Furthermore, the DS1863/DS1865's internal calibration features both
programmable scale and programmable offset, which eliminate most, if not all, external signal-conditioning
circuitry. With programmable scaling in the analog domain before the ADC, the input signal is scaled to
use the entire range of the ADC. Then while in the digital domain, right shifting can be used to divide the
digital output back down so that the desired (or mandated by SFF-8472) LSB remains unaffected and
even transparent to the user.
Analog Monitor Inputs
The block diagram of the DS1863/DS1865 MON inputs is shown in Figure 1. For clarity, only one input is
illustrated, although the concepts apply to all four MON inputs (MON1, MON2, MON3, and MON4). The
MON inputs are used to monitor signals like Tx Power and Rx Power.
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