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ADN2841ACPZ-32-RL7
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ADN2841ACPZ-32-RL7 应用笔记 - ADI

  • 制造商:
    ADI
  • 分类:
    接口,芯片
  • 封装
    LFCSP-32
  • 描述:
    IC,Laser Diode/LED Driver,LLCC,32Pin,CERAMIC
更新时间: 2025-06-16 13:46:56 (UTC+8)

ADN2841ACPZ-32-RL7 应用笔记

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AN-630
APPLICATION NOTE
One Technology Way P.O. Box 9106 Norwood, MA 02062-9106 Tel: 781/329-4700 Fax: 781/326-8703 www.analog.com
INTRODUCTION
This application note describes the ADN2841 laser diode
driver Rev. E1 evaluation kit. The evaluation kit is a dem-
onstration board that provides optical evaluation of the
ADN2841. This document describes how to congure the
board in order to operate the part optically. This applica-
tion note contains the following information:
• Board description
• Quick start for optical operation
• Description of board settings
• Component list
• Schematic of board
• Board layout information
• Silkscreen image of board
• Optical eyes
BOARD DESCRIPTION
The ADN2841 is a dual-loop 50 Mbps to 2.7 Gbps laser
diode driver. To use the board in an optical conguration,
a suitable laser diode driver must be soldered onto the
board. The monitor photodiode, MPD, current is fed into
the ADN2841 to control the average power and extinction
ratio. The ADN2841 uses automatic power control, APC, to
maintain a constant average power over time and tem-
perature. The ADN2841 uses closed-loop extinction ratio
control to allow optimum setting of extinction ratio for
every device. This board is congured for lasers in mini-
DIL packages only. LEDs for Power Supply, DEGRADE, and
FAIL are made available for monitoring purposes. Power
to the evaluation circuitry is –5 V only.
QUICK START FOR OPTICAL OPERATION
To ensure proper operation in the optical conguration,
verify the following:
1. Jumpers K3 and K4 are connected to A; Jumpers K2
and K5 are connected to B.
2. If the input data is clocked, it is necessary to enable the
clock select pin (CLKSEL). CLKSEL is enabled by con-
necting K4 to B. If the clock inputs are not used or
the input data is not latched, connect K4 to A.
3. The power supply is diode protected to ensure the device
is not damaged if a +5 V power supply is accidently
connected. The user may connect Jumper K1 (short
ADN2841 Optical Evaluation Kit
By Ferenc Barany, Mark Murphy, and Michael O’Flanagan
circuit) and power up the board by applying 5 V to the
power input SMA, J3. If Jumper K1 is not connected,
the user should make the power supply sufciently
negative to ensure that the DUT supply is 5 V. The
actual DUT supply can be measured at the anode of D1.
4. Apply a differential signal, typically 500 mV, to J6 and
J7 (DATAN and DATAP). Single-ended operation may
result in a degraded eye.
5. If the clock select pin is enabled by K4, apply a differ-
ential clock signal, typically 500 mV, to J4 and J5 (CLKN
and CLKP).
6. The optical eye and switching characteristics of the
ADN2841 may be observed using a digital communi-
cations analyzer that has an optical input channel with
the required bandwidth.
7. The bias and modulation currents can also be moni-
tored by observing IBMON and IMMON, respectively.
IBMON and IMMON are both a 1:100 ratio of I
BIAS
and
IMOD. Both are terminated with resistors and so can
be viewed at Test Points T3 and T4 using a voltmeter or
oscilloscope.
8. To establish the desired average power and extinction
ratio, the user should follow this procedure:
a. With the power supply turned off, adjust Poten-
tiometers R20 (ERSET) and R21 (PSET) to
approximately 20 k.
b. With the evaluation board powered on, reduce the
value of Potentiometer R21 to establish the desired
average optical power.
c. Potentiometer R20 can then be reduced in value
to increase the modulation current and therefore
increase the extinction ratio. The bias current will
decrease as the modulation current increases. The
bias and modulation currents can be monitored
using IBMON and IMMON.
When adjusting the extinction ratio, the user should allow
adequate time for the eye to settle. The allowable resistance
range at the Power Set Input (PSET), the Extinction Ratio
Set Input (ERSET), and the Alarm Set (ASET) is between
1 k and 25 k. Resistors R31 through R33 ensure that the
resistance at these nodes never falls below the minimum
allowable value. If the node resistances increase above 25 k,
the ADN2841 may not operate within its specications.
REV. 0

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