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KSZ8001LI
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KSZ8001LI 产品设计参考 - Microchip

  • 制造商:
    Microchip
  • 分类:
    以太网,控制器
  • 封装
    LQFP-48
  • 描述:
    PHY 1CH 10Mbps/100Mbps 1.8V/3.3V 48Pin LQFP Tray
更新时间: 2024-08-21 17:29:12 (UTC+8)

KSZ8001LI 产品设计参考

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Micrel, Inc. January 2006
AN-134, Rev.1.0
1
Introduction
This application note highlights the differences between the KS8721BL, KS8721CL and the KS8001L
single-port 10BASE-T/100BASE-TX/100BASE-FX PHYs. It serves also as an aid to transition those
designs using either the KS8721BL or KS8721CL to a new design using the KS8001L. Descriptions of pin
and register differences between the three devices are provided. Pin tables show the hardware migration
from an existing KS8721BL or KS8721CL design to a new KS8001L design.
The KS8721BL is Micrel’s fourth generation of Fast Ethernet single-port PHY. The KS8721CL is derived
directly from the KS8721BL and changes the LED output pins to support separate LINK and ACTIVITY
LEDs. The KS8001L is Micrel’s fifth generation of Fast Ethernet single-port PHY and adds advanced
features such as LinkMD cable diagnostics, reduced pin count serial interfaces to MAC/switch and
programmable LED modes. The KS8001L is not drop-in compatible with the KS8721BL/KS8721CL.
Contact your local Micrel FAE for details.
MII / RMII / SMII Pins
The MII and RMII pin outs are the same for all three devices. SMII is supported only by the KS8001L.
Table 1 below shows how the additional SMII mode select, data and control pins are mapped to some of
the MII and RMII pins. Refer to the respective datasheets for more information.
Table 1: SMII Pin Mapping to MII/RMII Pins
KS8721BL /
KS8721CL
KS8001L
Pin No. Signal Pin No. Signal Pin Description
6 RXD0 /
RXD[0]
6 RXD0 /
RXD[0] /
RX
MII Mode: Receive Data Output[0] /
RMII Mode: Receive Data Output[0] /
SMII Mode: Receive Data and Control
10 RXC 10 RXC /
SMII_SELECT
MII Mode: Receive Clock Output
Operating at:
25 MHz = 100 Mbps
2.5 MHz = 10 Mbps
SMII Mode: Select pin. An external pull-up on this pin
enables SMII mode during reset
15 TXC /
REFCLK
15 TXC /
REFCLK /
CLOCK
MII Mode: Transmit Clock Output /
RMII Mode: 50 MHz Reference Clock Input /
SMII Mode: 125 MHz Synchronization Clock Input
17 TXD0 /
TXD[0]
17 TXD0 /
TXD[0] /
TX
MII Mode: Transmit Data Input[0] /
RMII Mode: Transmit Data Input[0] /
SMII Mode: Transmit Data and Control
18 TXD1 /
TXD[1]
18 TXD1 /
TXD[1] /
SYNC
MII Mode: Transmit Data Input[1] /
RMII Mode: Transmit Data Input[1] /
SMII Mode: SYNC
KS8721BL / KS8721CL / KS8001L
Design Guide for Interchangeability
Application Note 134

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